The International Technology Roadmap for Semiconductors (ITRS) set specifications for water spots at less than one per wafer at both the 130- and 100-nm nodes. Other ITRS surface-preparation requirements at those technology levels include particle sizes of 65 and 50 nm, and defect densities of 0.091 and 0.085 per square centimeter, respectively.

Does your dryer meet ITRS specification?

Some new dryers based on the surface-tension gradient have been identified as potentially ineffective on high-aspect-ratio features. Because of the Marangoni effect, the gradient may be drastically reduced when the meniscus is lost, or it may be altered when it hits deeply cut features such as low IPA consumption.

ZERO PARTICLE ACHIEVED

SPOT FREE DRYING

ZERO ADDER

In-line Kimmon IPA vapor dryer demonstrated excellent process performance for IPA vapor condensation dryer that is fully integrated to a rinsing and chemical process wet station. The integrated technology meets the requirements of advanced processes such as ultrathin gate dielectric surface preparation, processes incorporating a wet etchback through a photoresist mask, and water spot–free processing of devices with high-aspect-ratio features. Particle and water spot data from several fab sites, including a start-up fabs confirming that the Kimmon technology meets the ITRS goals for 130-nm and sub-130-nm processing